1. Field of the Invention
This invention relates to a developing bias control device, developing unit and image forming apparatus, and more particularly to a developing bias control device that controls developing bias voltage with software, and a developing unit and image forming apparatus having the developing bias control device.
2. Description of Background Art
A developing unit built in an image forming apparatus forms an image from scanned image data using a photo conductor and developer-supplying rotary component, such as a developing sleeve and magnetic roller, which is used to supply developer to the photo conductor, and transfers the formed image onto a piece of paper to output. In order to properly supply the developer to the photo conductor, a predetermined developing bias voltage is applied to the developing sleeve and magnetic roller.
As shown in FIG. 6, the conventional developing unit uses hardware such as circuitry to transmit a square-wave signal 103 from a main board 101 to a high voltage power supply 102 which is used to apply developing bias voltage to the developing sleeve and other components, thereby controlling the developing bias voltage. Specifically, a controller generates an interrupt to control developing bias voltage at changing points 104 of the output level of the square-wave signal 103, the changing points being defined as time to switch the developing bias voltage.
A technique relating to the developing bias voltage control is disclosed in Japanese unexamined patent publication No. 2003-66697. For the purpose of preventing overshooting and undershooting of the developing bias voltage at a switching time, the publication discloses a developing transformer connected to a Zener diode having a breakdown voltage set equal to the upper limit of the AC components of developing bias voltage and a varistor having a varistor voltage set equal to the lower limit of the AC components of the developing bias voltage.
With consideration given to image quality improvement, it is preferable that the duty ratio and output pattern of the square-wave signal can be changed freely. Because of this, the use of software to control the developing bias voltage is more preferable than conventional voltage control by hardware.
In the case where software is used to control the developing bias voltage, the following technique may be employed. First, a first square-wave signal that instructs output of a first level and second level and a second square-wave signal that instructs output of a third level between the first and second levels are output; the instruction of the second square-wave signal has higher priority than that of the first square-wave signal. Based on the two square-wave signals, a square-wave signal for controlling the developing bias voltage is generated and output to a high voltage power supply to control the developing bias voltage.
FIG. 7 shows the two square-wave signals and the voltage-controlling square-wave signal generated from the two square-wave signals. FIG. 7(a) is a schematic view of the first square-wave signal. The first square-wave signal 111a has a level 112a instructing output of a first level and a level 112b instructing output of a second level. FIG. 7(b) is a schematic view of the second square-wave signal. The second square-wave signal 111b has a level 112c instructing output of a third level. FIG. 7(c) is a schematic view of the square-wave signal 111c for controlling developing bias voltage, which is generated based on the first and second square-wave signals 111a, 111b. 
Referring to FIG. 7, the voltage-controlling square-wave signal 111c generated based on the first and second square-wave signals 111a, 111b has a first level 113a, second level 113b and third level 113c. The third level 113c is a level between the first level 113a and second level 113b. The voltage-controlling square-wave signal 111c is generated by giving higher priority to the second square-wave signal 111b than the first square-wave signal 111a, more specifically, by giving higher priority to the level 112c than the level 112a when the level 112a of the first square-wave signal 111a coincides with the level 112c of the second square-wave signal 111b. The first and second square-wave signals 111a, 111b are output at right timing so that the voltage-controlling square-wave signal is shaped into a required waveform as shown in FIG. 7(c). In this description, the first and second square-wave signals 111a, 111b are output so that the level 112a and level 112c exhibit a perfect match, thereby intentionally generating the voltage-controlling square-wave signal 111c whose first level 113a does not occur in the vicinity of the third level 113c. 
In the case of intentionally obtaining the voltage-controlling square-wave signal 111c shown in FIG. 7(c) from first and second square-wave signals 114a, 114b shown in FIG. 8(a) and 8(b), respectively, a little delay of the second square-wave signal 114b may delay the rising edge to a level 115c for time tx with respect to the rising edge to the level 115a. This generates a voltage-controlling square-wave signal 114c, as shown in FIG. 8(c), including a first level 116a equal to the time tx which is a delay time of the rising edge to the level 115c. 
Accordingly, the first and second square-wave signals 114a, 114b output with a time lag result in an unintentional voltage-controlling square-wave signal 114c that includes an unintentional first level 116a combined with the front portion of the third level 116b. Proper control of the developing bias voltage is impossible with such a voltage-controlling square-wave signal having the unintentional output level, and therefore image quality may be deteriorated. Since the first and second square-wave signals are generated and activated by software, it is difficult to prevent the rise delay caused by the output timing of the first and second square-wave signals 114a, 114b. 